A double-diffused MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) has a structure in which a low concentration P-type layer (P body) and a high concentration N-type layer (N+ source layer) are formed by double diffusion on a front surface side of an N epitaxial layer formed on an N+ substrate.
For example, the Patent Document 1 listed below discloses a power device having a structure in which respective cells are partly connected to one another in a p extraction region (4), so that a p base layer (3) constituting each unit cell of an n channel DMOS element is short-circuited with a source electrode (9) at a region (Z2) through the p extraction region (4). In this Document, by using the above-mentioned structure, an operation of parasitic transistor is suppressed, and the withstand capability of the elements is improved. Note that reference numerals in parentheses correspond to those described in Patent Document 1.